一、 概述
目前 SYS_CTRL3 管脚在烧写和启动阶段都是高电平,本文章主要介绍在烧写阶段拉低这个管脚,启动阶段不做控制。
二、 步骤
1、先做控制,查看此管脚是否可以控制,调用以下代码,实测可以在启动阶段将此管脚拉低。
int enable_sys_control3(void)
{
void *handle;
int ret = 0;
int id = 2;
int mode = PWR_CTRL_OUTPUT;
int manual = PWR_CTRL_OUTPUT_MANUAL; ;
int level = PWR_CTRL_OUTPUT_LOW;
ret = hal_pmu_creat_handle(&handle, RES_PMU_PMU);
if (0 != ret) {
dprintf(CRITICAL, "get handle fail\n");
return ret;
}
ret = hal_pmu_init(handle);
if (0 != ret) {
dprintf(CRITICAL, "pmu init fail\n");
return ret;
}
/* set ctrl_id as output mode*/
ret = hal_pmu_set_powerctrl_io_mode(handle, id, mode);
if (0 != ret) {
dprintf(CRITICAL, "pmu set powerctrl io mode fail\n");
return ret;
}
/* set output as auto or manual*/
ret = hal_pmu_set_powerctrl_out_mode(handle, id, manual);
if (0 != ret) {
dprintf(CRITICAL, "pmu set powerctrl out mode fail\n");
return ret;
}
/* set powerctrl out high or low*/
ret = hal_pmu_set_powerctrl_out_ctrl(handle, id, level);
if (0 != ret) {
dprintf(CRITICAL, "pmu set powerctrl out level fail\n");
return ret;
}
ret = hal_pmu_exit(handle);
if (0 != ret) {
dprintf(CRITICAL, "pmu exit fail\n");
return ret;
}
ret = hal_pmu_release_handle(handle);
if (0 != ret) {
dprintf(CRITICAL, "release handle fail\n");
return ret;
}
return 0;
}
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2、参考《 G9_Processor_TRM_Rev00.12.pdf 》3798-3901 页,设置 pmu 寄存器,
在路径 /buildsystem/rtos/freertos_safetyos/application/system/soc-init/scr_init.c 添加如下代码
static void sys_ctrl3_test_start(void)
{
uint32_t rval;
rval = readl(0xF1850018);
rval = (rval & (0XFFD7FFFF));
rval = (rval | (0X00100000));
writel(rval, 0xF1850018);
}
#endif
/* hardcode scr init by following Z1 configuration when system boot */
static void src_init_hc(void)
{
uint32_t rval;
/* selects the ENET2 PHY interface of the ethernet MAC as RGMII */
rval = readl(APB_SCR_SEC_BASE + (0x614 << 10));
rval = (rval & (~0x38)) | 0x8;
writel(rval, APB_SCR_SEC_BASE + (0x614 << 10));
/* Set i2S SC default mode to full duplex-mode*/
rval = readl(APB_SCR_SEC_BASE + (0xC << 10));
#if (TARGET_REFERENCE_D9 || TARGET_REFERENCE_D9P)
rval = rval | 0x3D;
#else
rval = rval | 0x3F;
#endif
writel(rval, APB_SCR_SEC_BASE + (0xC << 10));
#ifndef SYS_CTRL3_YX
sys_ctrl3_test_start();//Ryan add
#endif
}
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3、同时在 DIL2 阶段 mk 文件增加宏控制
路径:/buildsystem/rtos/freertos_safetyos/project/common/dil2.mk
添加宏控:$(call add_defines_if_true,SYS_CTRL3_YX)
路径:/buildsystem/rtos/freertos_safetyos/project/dil2-safety-g9x-ref.mk
添加宏控:SYS_CTRL3_YX := true
最后实际测量在烧写阶段成功拉低 SYS_CTRL3,在启动阶段不拉低。
接下来将更新更多关于 SemiDrive G9 系列的文章,感兴趣的可以在评论区评论或关注。
三、 参考文档
《 G9_Processor_TRM_Rev00.12.pdf 》四、 总结
以上步骤实现了 SemiDrive G9 在烧写阶段拉低 SYS_CTRL3 管脚。接下来将更新更多关于 SemiDrive G9 系列的文章,感兴趣的可以在评论区评论或关注。
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